Using the Perlmutter supercomputer, researchers achieved a record-scale simulation of a quantum microchip to refine and validate next-generation quantum hardware designs.
To carry out the work, the team relied on more than 7,000 NVIDIA GPUs running on the Perlmutter supercomputer at the National Energy Research Scientific Computing Center (NERSC), a U.S. Department of Energy (DOE) user facility.
Simulating quantum chips before they are physically built allows scientists to evaluate how they will function and identify potential design flaws early. By testing performance in a virtual environment, researchers can improve reliability and reduce costly fabrication iterations. Zhi Jackie Yao and Andy Nonaka of the Applied Mathematics and Computational Research (AMCR) Division at Berkeley Lab, both part of the Quantum Systems Accelerator (QSA), develop advanced electromagnetic models to analyze how these chips behave, a crucial step toward building more capable quantum hardware.
“The computational model predicts how design decisions affect electromagnetic wave propagation in the chip,” said Nonaka, “to make sure proper signal coupling occurs and avoid unwanted crosstalk.”
For this project, the team employed ARTEMIS, their exascale modeling platform, to simulate and refine a chip developed through a partnership between Irfan Siddiqi’s Quantum Nanoelectronics Laboratory at the University of California, Berkeley, and Berkeley Lab’s Advanced Quantum Testbed (AQT). Yao will present the technical results at the International Conference for High Performance Computing, Networking, Storage, and Analysis (SC25).
